synchronous counter
英 [ˈsɪŋkrənəs ˈkaʊntə(r)]
美 [ˈsɪŋkrənəs ˈkaʊntər]
网络 同步计数器; 计数器; 同步计数器的工作原理
双语例句
- Design of four valued synchronous reversible counter based on the theory of three essential circuit elements A
基于电路三要素理论的四值同步可逆计数器设计 - Since the above inequality is not satisfied a serial-carry synchronous counter can not be used.
因上述不等式不能成立，所以不能采用串行进位同步计数器。 - In a synchronous counter all stages are triggered by a common clock.
器中，所有触发器均由同一个时钟触发。 - This type of counter is called a parallel-carry synchronous counter.
这种计数器称为并行进位同步计数器。 - Synchronization mechanism is implemented by synchronous counter.
同步机制通过同步计数器实现。 - Then the method of using GAL to design the eight bit binary reversible synchronous counter and a kind of logic design software& CUPL language are also introduced.
同时介绍一种通用逻辑设计软件&CUPL语言.文中着重介绍了八位二进制可逆同步计数器的功能特点及其用GAL设计的方法。 - Optimization of the design of module-N synchronous counter
任意进制同步计数器的优化设计 - The Automatic Run Design of the Synchronous Counter
同步计数器的自启动设计 - In this paper a formula for the design of an arbitrary module-2n counter with cyclic code is suggested. Based on it, the paper analyses a method about how to form the module-2N+ 1 synchronous counter with cyclic-code.
本文推导了任意2n进制循环码计数器的设计公式，并在此基础上分析了2N+1进制同步循环码计数器的构成方法。 - A modification method applied to the design of synchronous counter is introduced.
介绍了运用修改法设计同步计数器的方法。 - Waveform, Sequence and Shift Counter Synthesis& Realization of Synchronous Frequency-Division by Means of Shift Counter
波形、序列及移位计数器的综合&用移位计数器实现同步分频 - Design of the Module-2N+ 1 Synchronous Counter with Cyclic-Code
2N+1进制同步循环码计数器设计 - On the basis of the ordinary design method of synchronous counter and linking laws of synchronous binary counters, this paper gives a simpler and more direct modification method for optimization of the design of module-N synchronous counter, and elaborates the application of the modification method.
在同步计数器的一般设计方法和同步二进制计数器的连接规律的基础上，提出更简捷、迅速、方便的利用修改法优化设计任意进制同步计数器，并做了举例说明。 - The spectrum characteristics of synchronous jamming on range and velocity are analyzed. A method for a PD radar to counter the jamming is also discussed.
分析了存在距离-速度同步拖引干扰时的信号频谱特征，研究了一种脉冲多普勒（PD）雷达抗距离-速度同步拖引干扰的方法。 - The designed examples show that the method used to design the module? N+ 1 synchronous counter with cyclic code has the advantages of being easy and fast, and is of certain practical significance.
通过设计实例表明，用此方法设计2N+1进制同步循环码计数器具有使用方便，设计迅速等优点和一定的实用意义。 - The design of eight-bit binary reversible synchronous counter with GAL device
用GAL设计八位二进制可逆同步计数器